Proceedings of the International Seminar on Computation, Communication and Control

Design of SPWM Generator IP Core Based on SOPC

Authors
Huang XiangSheng, Wang Qun
Corresponding Author
Huang XiangSheng
Available Online March 2015.
DOI
https://doi.org/10.2991/is3c-15.2015.8How to use a DOI?
Keywords
SOPC; FPGA; SPWM; sin wave; IP; simulation
Abstract
A waveform circuit of SPWM based on SOPC is designed. In Quartus II 9. 0 environment, Using Verilog HDL and module design method the design is completed. The selected FPGA model is EP2C35F672C6 in Cyclone series. According to the principle of sinusoidal PWM by irregular sampling, using the real-time overlapping of sine wave and triangular wave, the periodic adjustable SPWM wave is achieved. The results of simulation show that SPWM generator IP core could be embedded in special processor, and realize the driving of SPWM components.
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Proceedings
International Seminar on Computation, Communication and Control (IS3C-15)
Part of series
Advances in Computer Science Research
Publication Date
March 2015
ISBN
978-94-62520-55-4
ISSN
2352-538X
DOI
https://doi.org/10.2991/is3c-15.2015.8How to use a DOI?
Open Access
This is an open access article distributed under the CC BY-NC license.

Cite this article

TY  - CONF
AU  - Huang XiangSheng
AU  - Wang Qun
PY  - 2015/03
DA  - 2015/03
TI  - Design of SPWM Generator IP Core Based on SOPC
BT  - International Seminar on Computation, Communication and Control (IS3C-15)
PB  - Atlantis Press
SP  - 33
EP  - 36
SN  - 2352-538X
UR  - https://doi.org/10.2991/is3c-15.2015.8
DO  - https://doi.org/10.2991/is3c-15.2015.8
ID  - XiangSheng2015/03
ER  -