Design of High Speed Sampling Clock Based on LMX2531

DOI

10.2991/iccia-16.2016.76How to use a DOI?

Keywords

LMX2531; Sampling clock; Verilog HDL; Low jitter.

Abstract

The LMX2531 is a low power, high performance frequency synthesizer system which includes a fully integrated delta-sigma PLL and VCO with fully integrated tank circuit. The third and fourth poles are also integrated and also adjustable. Also included are integrated ultra-low noise and high precision LDOs for the PLL and VCO which give higher supply noise immunity and also more consistent performance. When combined with a high quality reference oscillator, the LMX2531 generates very stable, low noise local oscillator signals for up and down conversion in wireless communication devices. In the system, the LMX2531 is controlled by FPGA. It outputs a 1500MHz clock signal through programmed eleven 24-bit registers with Verilog HDL. The signal is very suitable to be used as the sampling clock of ADC in high speed acquisition system for it has the characteristics of low jitter and high stability.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Bing Zhou
AU  - Zhengsheng Li
AU  - Hao Chen
PY  - 2016/09
DA  - 2016/09
TI  - Design of High Speed Sampling Clock Based on LMX2531
BT  - Proceedings of the 2016 International Conference on Computer Engineering, Information Science & Application Technology (ICCIA 2016)
PB  - Atlantis Press
SP  - 413
EP  - 417
SN  - 2352-538X
UR  - https://doi.org/10.2991/iccia-16.2016.76
DO  - 10.2991/iccia-16.2016.76
ID  - Zhou2016/09
ER  -