The Clock System in Readout Electronics System for the External Target Experiment in CSR of HIRFL

DOI

10.2991/cisia-15.2015.86How to use a DOI?

Keywords

cycle to cycle jitter; period jitter; clock skew; LVDS; clock system

Abstract

A high precision clock system is required in the external target experiment of the Cooling Storage Ring (CSR) project in the Heavy Ion Research Facility in Lanzhou (HIRFL). Considering that the detectorsare located in different places of the experimental hall, a high quality clock signal is required to be generated and distributed to multiple measurement modules over long distances. The clock system is based on a master-slave structure: the slave clock module (SCM) receives the clock signal from the master clock module (MCM) through fiber, and then distributes it to the measurement modules within the same PXI crate. Laboratory test results indicate that the period jitter and cycle-to-cycle jitter of this clock system is better than 5 ps and 8.5 ps respectively. We also conducted tests on the TOF (time of flight) readout modules (with the highest time measurement resolution in the readout electronics) combined with this clock system, and a time resolution better than 25 ps is achieved, beyond the requirement.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - L.S Zhan
AU  - L. Zhao
AU  - L.F Kang
AU  - J.X Liu
AU  - M. Li
AU  - S.B Liu
AU  - Q. An
PY  - 2015/06
DA  - 2015/06
TI  - The Clock System in Readout Electronics System for the External Target Experiment in CSR of HIRFL
BT  - Proceedings of the International Conference on Computer Information Systems and Industrial Applications
PB  - Atlantis Press
SP  - 315
EP  - 318
SN  - 2352-538X
UR  - https://doi.org/10.2991/cisia-15.2015.86
DO  - 10.2991/cisia-15.2015.86
ID  - Zhan2015/06
ER  -