LDPC Anti-Cycle-Slip Analysis and Design for BPSK System

DOI

10.2991/icmit-16.2016.31How to use a DOI?

Keywords

LDPC; Anti-Cycle-Slip; LLR; odd-degree

Abstract

Carrier phase often suddenly change while receiver PLL unlock at PSK modulation communication system, it lead to likelihood information sequence which input of LDPC decoder not accurate and decode fail. This paper analyzed the regularity of LLR information after Cycle-Slip happened and combine with MS decode algorithm improved the Anti-Cycle-Slip decode algorithm. It not only raised the ability of Anti-Cycle-Slip, but also alters the conclusion that all check-nodes degree must be odd number, this found provide a more convenient way for LDPC Anti-Cycle-Slip design

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Wang-Chun Lei
AU  - Jian Cheng
AU  - Jian-Hui Xu
AU  - Xin-Xin Ge
PY  - 2016/04
DA  - 2016/04
TI  - LDPC Anti-Cycle-Slip Analysis and Design for BPSK System
BT  - Proceedings of the 2016 3rd International Conference on Mechatronics and Information Technology
PB  - Atlantis Press
SP  - 166
EP  - 170
SN  - 2352-538X
UR  - https://doi.org/10.2991/icmit-16.2016.31
DO  - 10.2991/icmit-16.2016.31
ID  - Lei2016/04
ER  -