Diagnosis Method Based on Chaos Optimization Algorithm of The Testability of Complex circuit system

DOI

10.2991/iccmcee-15.2015.100How to use a DOI?

Keywords

testability design, boundary scan, board-level circuit

Abstract

It needs to put structure of boundary scan in the circuit board for improving the controllability and observability of the device in complex circuit board. At the same time when structure of boundary scan improves pcb-level circuit testability, it also increased the complexity of circuit design which needs to weigh the testability improvement and design complexity, two factors. In view of the combinatorial optimization problem of the design complexity and minimize, solving method based on chaos optimization algorithm is proposed. Through example validation, the algorithm were obtained good results on optimization effect and operation time. The fact proved that, the algorithm can be effectively applied in board-level circuit testability design optimization and improving pcb-level circuit testability.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - BaoChen Li
AU  - Xiaobo Lu
AU  - Chuan Liu
AU  - XiaoLiang Zhang
PY  - 2015/11
DA  - 2015/11
TI  - Diagnosis Method Based on Chaos Optimization Algorithm of The Testability of Complex circuit system
BT  - Proceedings of the 2015 4th International Conference on Computer, Mechatronics, Control and Electronic Engineering
PB  - Atlantis Press
SP  - 546
EP  - 551
SN  - 2352-5401
UR  - https://doi.org/10.2991/iccmcee-15.2015.100
DO  - 10.2991/iccmcee-15.2015.100
ID  - Li2015/11
ER  -