A case of area- and energy-efficient heterogeneous mesh network-on-chip

DOI

10.2991/csss-14.2014.38How to use a DOI?

Keywords

network-on-chip; interconnection; system-on-chip; multiprocessor

Abstract

In this paper, based on observation on performance analysis of mesh network, we proposed a case of area- and energy-efficient heterogeneous mesh network by redistributing and reconfiguring scarce network resources, buffers, links and ports, to enhance network performance. Experimental results show that proposed network can achieve maximum saturation improvement by up to 16.7% and improve network latency by up to 35% while reduce about 31.7% router area. Experimental results also show that diagonal link is efficient design for mesh network topology.

Copyright

© 2014, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Jili Yan
AU  - Guoming Lai
AU  - Xiaola Lin
PY  - 2014/06
DA  - 2014/06
TI  - A case of area- and energy-efficient heterogeneous mesh network-on-chip
BT  - Proceedings of the 3rd International Conference on Computer Science and Service System
PB  - Atlantis Press
SP  - 167
EP  - 170
SN  - 1951-6851
UR  - https://doi.org/10.2991/csss-14.2014.38
DO  - 10.2991/csss-14.2014.38
ID  - Yan2014/06
ER  -