Full HD Real-time Depth Estimation Algorithm and Hardware Implementation
- DOI
- 10.2991/acta-14.2014.16How to use a DOI?
- Keywords
- Depth estimation; full HD; hardware implementation; Real-time
- Abstract
This paper presents a novel implementation for real-time depth estimation which can support full HD resolution for 3D video stream. We propose a package of solution to address the major difficulties in depth estimation, such as expensive computation, depth accuracy, real-time implementation and high definition progressing. Different from the typical single stereo vision methods, we take fusion strategy which can reduce errors caused by individual measure. The FPGA-based design is selected for real-time implementation which can achieve the maximum processing speed of 125fps, with maximum disparity search range of 240 pixels, full HD (1920 × 1080p) resolution image. Multi-resolution method which includes interpolation method and synthesizers are used for improve the efficiency and stability. The implementation can be included in video system for live 3DTV application and can be used as an independent hardware module in low-power application.
- Copyright
- © 2014, the Authors. Published by Atlantis Press.
- Open Access
- This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).
Cite this article
TY - CONF AU - Li Hejian AU - An Ping AU - Teng Guowei AU - Zuo Yifan AU - Zhang Zhaoyang PY - 2014/06 DA - 2014/06 TI - Full HD Real-time Depth Estimation Algorithm and Hardware Implementation BT - 2014 International Conference on Automatic Control Theory and Application PB - Atlantis Press SP - 63 EP - 66 SN - 2352-5398 UR - https://doi.org/10.2991/acta-14.2014.16 DO - 10.2991/acta-14.2014.16 ID - Hejian2014/06 ER -