Research of Automatic Generating Analog Circuits Fault Tree Based on IEEE 1232

DOI

10.2991/meic-15.2015.136How to use a DOI?

Keywords

analog circuit; IEEE1232; fault tree; support vector; automatic generate

Abstract

In analog circuit automatic generating fault tree field, several problems are as below: currently the fault tree model had not strong structural to provide the detail realization method to automatic generating fault tree and only used Support Vector Machine algorithm to automatic generating fault tree the accuracy and stability are insufficient, the generating fault tree method is non-portable. Paper combines the SVM algorithm and the fault tree model based on IEEE 1232, analyzes the characteristics of the new fault tree model, designs and put forwards the automatic generating fault tree method, the stability and the accuracy of the generated fault tree are improved, and the portability of the automatic generating fault tree method is strengthened. Paper designs and implements the automatic generating fault tree model based on IEEE1232; the results show that the feasibility of the plan, the accuracy and the stability of the new fault tree model are improved.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Yuehai Wang
AU  - Menghan Xu
PY  - 2015/04
DA  - 2015/04
TI  - Research of Automatic Generating Analog Circuits Fault Tree Based on IEEE 1232
BT  - Proceedings of the 2015 International Conference on Mechatronics, Electronic, Industrial and Control Engineering
PB  - Atlantis Press
SP  - 598
EP  - 601
SN  - 2352-5401
UR  - https://doi.org/10.2991/meic-15.2015.136
DO  - 10.2991/meic-15.2015.136
ID  - Wang2015/04
ER  -