Proceedings of the 11th Joint Conference on Information Sciences (JCIS 2008)

Multilevel Based Global Routing Algorithm for Hierarchical FPGA

Authors
Limin Zhu1, Jinan Bian, Qiang Zhou, Xianlong Hong
1Department of Computer Science, Tsinghua University, PRC
Corresponding Author
Limin Zhu
Available Online December 2008.
DOI
https://doi.org/10.2991/jcis.2008.18How to use a DOI?
Keywords
FPGA, Hierarchical Architecture, Routability, Global Routing Algorithm
Abstract

This paper presents an efficient global routing algorithm for a hierarchical inter-connection architecture of FPGA. What is different from the traditional FPGA rout-ing algorithm is that the proposed algo-rithm takes advantage of the hierarchical structure of this particular FPGA. We use a hierarchical tree as the routing resource representation of the corresponding inter-connection architecture. In the routing phase, the global routing problem for each net is represented as a sub-tree de-termination problem. As soon as the loca-tion of each Logic Block is fixed, we can use a tree-growth-like algorithm to de-termine the sub-tree on the corresponding routing resource tree. The algorithm is very efficient and fast since the sub-tree is determined once we determined the po-sition of each Logic Block. On the other hand, we can use this method to evaluate the routability of the corresponding placement results.

Copyright
© 2008, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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Volume Title
Proceedings of the 11th Joint Conference on Information Sciences (JCIS 2008)
Series
Advances in Intelligent Systems Research
Publication Date
December 2008
ISBN
978-90-78677-18-5
ISSN
1951-6851
DOI
https://doi.org/10.2991/jcis.2008.18How to use a DOI?
Copyright
© 2008, the Authors. Published by Atlantis Press.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

Cite this article

TY  - CONF
AU  - Limin Zhu
AU  - Jinan Bian
AU  - Qiang Zhou
AU  - Xianlong Hong
PY  - 2008/12
DA  - 2008/12
TI  - Multilevel Based Global Routing Algorithm for Hierarchical FPGA
BT  - Proceedings of the 11th Joint Conference on Information Sciences (JCIS 2008)
PB  - Atlantis Press
SP  - 105
EP  - 111
SN  - 1951-6851
UR  - https://doi.org/10.2991/jcis.2008.18
DO  - https://doi.org/10.2991/jcis.2008.18
ID  - Zhu2008/12
ER  -