Design on Interface Circuit of Simulation Training Evaluation subsystem for an Antiaircraft Missile hardware-in-loop simulator

DOI

10.2991/itoec-16.2016.84How to use a DOI?

Keywords

antiaircraft missile; interface circuit of simulation training evaluation subsystem; interface circuit

Abstract

A simulation training evaluation subsystem can't be ignored when an antiaircraft missile simulator is developed whatever type it is. Otherwise, the result of simulation training couldn't be verified. So one of key difficulties is how to design and realize its Interface Circuit when an antiaircraft missile hardware-in-loop simulator is implemented. Interface circuit of simulation training evaluation subsystem provides quantitative data for the evaluating subsystem. By means of quantitative data sampled, the evaluating system could record and analyze whether operations is right or not. The interface circuit, whose kernel component is I/O card PCL-722, is designed combined with exploitation of one antiaircraft missile hardware-in-loop simulator. Experiments show that the design of the mentioned interface circuit is feasible and effective.

Copyright

© 2016, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Li Ke
AU  - Li Yan
AU  - Jiang Huixia
AU  - He Xin
PY  - 2016/05
DA  - 2016/05
TI  - Design on Interface Circuit of Simulation Training Evaluation subsystem for an Antiaircraft Missile hardware-in-loop simulator
BT  - Proceedings of the 2nd Information Technology and Mechatronics Engineering Conference (ITOEC 2016)
PB  - Atlantis Press
SP  - 439
EP  - 442
SN  - 2352-5401
UR  - https://doi.org/10.2991/itoec-16.2016.84
DO  - 10.2991/itoec-16.2016.84
ID  - Ke2016/05
ER  -