A low-complexity decoder based on LDPC
Feilong Yun, Hongpeng Zhu, Feng Du, Jing Lv
Available Online April 2016.
- https://doi.org/10.2991/icmit-16.2016.51How to use a DOI?
- This paper designs a low-complexity decoder based on LDPC of GPS standards.In the design ,the decoder we only uses a CNU(Check Node Unit) in the decoding process,which reduce the hardware sources effectively.Besides,we decreases the decoding complexity through the check matrix equivalence transformation,At last ,we realize the decoder based on Xilinx Kintex7 XC7K325T FPGA.The result suggests that the resources only consumes 124 slices after the software ISE layout and wire.
- Open Access
- This is an open access article distributed under the CC BY-NC license.
Cite this article
TY - CONF AU - Feilong Yun AU - Hongpeng Zhu AU - Feng Du AU - Jing Lv PY - 2016/04 DA - 2016/04 TI - A low-complexity decoder based on LDPC BT - 2016 3rd International Conference on Mechatronics and Information Technology PB - Atlantis Press SN - 2352-538X UR - https://doi.org/10.2991/icmit-16.2016.51 DO - https://doi.org/10.2991/icmit-16.2016.51 ID - Yun2016/04 ER -