A 5-Gb/s 156-mW Transceiver with FFE/Analog Equalizer in 90-nm CMOS Technology

DOI

10.2991/iccmcee-15.2015.151How to use a DOI?

Keywords

Limiting Amplifier; CTLE; Feed-forward Equalizer; Transceiver

Abstract

A 5-Gb/s transceiver in 90nm technology has been presented in this paper. To mitigate the effects of channel loss, a 4-tap feed-forward equalizer (FFE) is included in the transmitter. Meanwhile, the receiver employs continuous-time linear equalizer (CTLE) to amplify high frequency signal. The clocks of the transmitter are supplied by Phase-Locked Loops (PLL) while clocks in the receiver are provided by clock recover circuit (CDR). To facilitate the testing, built-in pseudo-random sequence (PRBS) generator and PRBS detector are integrated in this chip. Fabricated in 90nm CMOS technology, the transceiver consumes 156mW under 1.2V supply.

Copyright

© 2015, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - XingHua Wang
AU  - ZhengChen Wang
AU  - Xiaoyan Gui
PY  - 2015/11
DA  - 2015/11
TI  - A 5-Gb/s 156-mW Transceiver with FFE/Analog Equalizer in 90-nm CMOS Technology
BT  - Proceedings of the 2015 4th International Conference on Computer, Mechatronics, Control and Electronic Engineering
PB  - Atlantis Press
SP  - 826
EP  - 832
SN  - 2352-5401
UR  - https://doi.org/10.2991/iccmcee-15.2015.151
DO  - 10.2991/iccmcee-15.2015.151
ID  - Wang2015/11
ER  -