FPGA Software Design for the Missile-borne Computer with DSP and FPGA as Its Core

DOI

10.2991/caai-18.2018.17How to use a DOI?

Keywords

missile-borne computer; FPGA; EMIF; software design

Abstract

In order to meet the requirement of stability, real-time performance and miniaturization, a missile-borne computer with DSP and FPGA as its core processor is designed. FPGA communicates with DSP via EMIF for extension of various peripheral interfaces, including the serial port, AD converter and IO operation. This paper presents the FPGA software design in detail. The software structure is shown and its function modules are analyzed one by one. And also the registers for EMIF are defined and introduced. After several ground tests, the FPGA software works well in the missile-borne computer, indicating that it is feasible and reliable, fulfilling the design demand. The follow-up flight test in the future will verify its performance further.

Copyright

© 2018, the Authors. Published by Atlantis Press.

Open Access

This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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TY  - CONF
AU  - Tao Yang
AU  - Jinpeng Yang
AU  - Shuaibing Wang
AU  - Ling Li
PY  - 2018/08
DA  - 2018/08
TI  - FPGA Software Design for the Missile-borne Computer with DSP and FPGA as Its Core
BT  - Proceedings of the 2018 3rd International Conference on Control, Automation and Artificial Intelligence (CAAI 2018)
PB  - Atlantis Press
SP  - 75
EP  - 78
SN  - 2589-4919
UR  - https://doi.org/10.2991/caai-18.2018.17
DO  - 10.2991/caai-18.2018.17
ID  - Yang2018/08
ER  -